Mplab PingPong
Publicado por roberto flores (1 intervención) el 06/06/2021 08:44:27
Hola buenas noches, necesito ayuda con mi codigo, no logro hacer que funcione mi ping pong
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/* * File: PING-PONG.c */// PIC18F4550 Configuration Bit Settings// 'C' source line config statements// CONFIG1L#include <stdio.h>#include <stdlib.h>#USE STANDARD_IO (A)#USE STANDARD_IO (B)// PIC18LF4550 Configuration Bit Settings// 'C' source line config statements#include <xc.h>// #pragma config statements should precede project file includes.// Use project enums instead of #define for ON and OFF.// CONFIG1L#pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])#pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary oscillator block with no postscale)// CONFIG1H#pragma config FOSC = INTOSC_HS // Oscillator Selection bits (Internal oscillator, HS oscillator used by USB (INTHS))#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)// CONFIG2L#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled)#pragma config BOR = ON // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting)#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage regulator disabled)// CONFIG2H#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT enabled)#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)// CONFIG3H#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are configured as analog input channels on Reset)#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)#pragma config MCLRE = OFF // MCLR Pin Enable bit (RE3 input pin enabled; MCLR pin disabled)// CONFIG4L#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled)#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled)#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))// CONFIG5L#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is not code-protected)#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is not code-protected)#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is not code-protected)#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is not code-protected)// CONFIG5H#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) is not code-protected)#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is not code-protected)// CONFIG6L#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) is not write-protected)#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) is not write-protected)#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) is not write-protected)#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) is not write-protected)// CONFIG6H#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) are not write-protected)#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) is not write-protected)#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is not write-protected)// CONFIG7L#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) is not protected from table reads executed in other blocks)#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) is not protected from table reads executed in other blocks)// CONFIG7H#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) is not protected from table reads executed in other blocks)#define _XTAL_FREQ 40000/* * */void main()
{ //setup_adc_ports(NO_ANALOGS|VSS_VDD); //setup_adc(ADC_OFF); //setup_psp(PSP_DISABLED); //setup_spi(SPI_SS_DISABLED); //setup_wdt(WDT_OFF); //setup_timer_0(RTCC_INTERNAL); //setup_timer_1(T1_DISABLED); //setup_timer_2(T2_DISABLED,0,1); //setup_comparator(NC_NC_NC_NC); //setup_vref(FALSE);//Setup_Oscillator parameter not selected from Intr Oscillator Config tab // TODO: USER CODE!!ADCON1 = 0x0F; //Todos los pines como I/O digitales
OSCCON = 0x62; // Reloj interno 4MHz
TRISB = 0xFF; TRISA= 0x00PORTAbits.RA0=0;
PORTAbits.RA1=0;
PORTBbits.RB0=0;
PORTBbits.RB1=0;
PORTBbits.RB2=0;
while(1) //Bucle infinito
{if (PORTBbits.RB2==0)
{output_high(PIN_A0);
}else
{PORTBbits.RB4=1;
} }}Valora esta pregunta
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